Altera Avalon Verification IP Suite - Manual (Page 69)

set_response_request()
void set_response_request(Request_t request)
Prototype:
Verilog HDL: Request_t request
VHDL: Request_t request , bfm_id , req_if(bfm_id)
Arguments:
void
Returns:
Sets the transaction type to read or write in the response descriptor. The
enumeration type defines
REQ_READ = 0 and REQ_WRITE = 1 .
Description:
Verilog HDL, VHDL Language support:
set_response_timeout()
void set_response_timeout(int cycles)
Prototype:
Verilog HDL: None
VHDL:
bfm_id
,
req_if(bfm_id)
Arguments:
void Returns:
Sets the number of cycles that may elapse before timing out. Description:
Verilog HDL, VHDL Language support:
set_write_response_id()
void set_write_respose_id(AvalonTransactionId_t id)
Prototype:
Verilog HDL:
AvalonTransactionId_t id
VHDL:
AvalonTransactionId_t id
,
bfm_id
,
req_if(bfm_id)
Arguments:
void Returns:
Sets the transaction ID on the avs_writeid pin. Description:
Verilog HDL, VHDL Language support:
Altera Corporation Avalon-MM Slave BFM
Send Feedback
6-21 set_response_request()