Altera Avalon Verification IP Suite - Manual (Page 63)

get_command_transaction_id()
AvalonTransactionId_t get_command_transaction_id()
Prototype:
Verilog HDL: None
VHDL: command_transaction , bfm_id , req_if(bfm_id)
Arguments:
AvalonTransactionId_t
Returns:
Queries the received command descriptor for the transaction ID. Description:
Verilog HDL, VHDL Language support:
get_command_write_response_request()
AvalonTransactionId_t get_command_write_response_request()
Prototype:
Verilog HDL: None
VHDL:
command_write_response_request
,
bfm_id
,
req_if(bfm_id)
Arguments:
AvalonTransactionId_t Returns:
Queries the received command descriptor for the
write_response_request
field
value. A value of 1 indicates that the master has requested for a write response.
Description:
Verilog HDL, VHDL Language support:
get_pending_read_latency_cycle()
int get_pending_read_latency_cycle()
Prototype:
Verilog HDL: None
VHDL:
pending_read_latency_cycle
,
bfm_id
,
req_if(bfm_id)
Arguments:
int Returns:
Queries the read command queue to determine the cycles needed for the Slave
BFM to complete the current read response. This method notifies the master when
the Slave BFM is ready to receive a command. Description:
Verilog HDL, VHDL Language support:
Altera Corporation Avalon-MM Slave BFM
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6-15 get_command_transaction_id()