Altera Avalon Verification IP Suite - Manual (Page 150)

set_enable_c_valid_non_ready()
set_enable_c_valid_non_ready() Prototype:
Verilog HDL:
Boolean
VHDL: N.A.
Arguments:
void
Returns:
Enables a coverage point that ensures test coverage for
valid
signal when
ready
is deasserted. It is disabled when the
readyLatency
is greater than 0.
Description:
Verilog HDL Language support:
Transaction Monitoring
The transaction collector module monitors transactions. The transaction collector collects the transactions,
encapsulates them into descriptors, and inserts the transactions into the queue.
The API provides functions to query the transactions in the queue and disposes them as they are processed.
By default, the transaction collector module is disabled. You must define the
ENABLE_ALTERA_AVALON_TRANSACTION_RECORDING
Verilog macro to enable this feature. This macro is
required to ensure backward compatibility and to avoid breaking existing test cases.
event_transaction_received()
event_transaction_received() Prototype:
Verilog HDL: N.A.
VHDL:
bfm_id
Arguments:
void
Returns:
Notifies the testbench that a transaction was received. Description:
VHDL Language support:
event_transaction_fifo_threshold()
event_transaction_fifo_threshold()
Prototype:
Verilog HDL: N.A.
VHDL:
bfm_id
Arguments:
void
Returns:
Notifies the testbench that the transaction FIFO exceeds the threshold level. Description:
VHDL Language support:
Avalon-ST Monitor Altera Corporation
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set_enable_c_valid_non_ready() 10-14