Get_result_delay(), Get_result_queue_size(), Get_result_value() – Altera Avalon Verification IP Suite User Manual
Page 181
get_result_delay()
int get_result_delay()
Prototype:
Verilog HDL: None
VHDL:
result_delay
,
bfm_id
,
req_if(bfm_id)
Arguments:
Width of the data
(ci_data_t)
that can contain the following variables:
•
[Word_width-1:0]
•
[Ext_width-1:0]
•
[Addr_width-1:0]
Returns:
Returns the result delay.
Description:
Verilog HDL, VHDL
Language support:
get_result_queue_size()
int get_result_queue_size(int size)
Prototype:
Verilog HDL: None
VHDL:
result_queue_size
,
bfm_id
,
req_if(bfm_id)
Arguments:
int size
.
Returns:
Returns the number of results in the queue.
Description:
Verilog HDL, VHDL
Language support:
get_result_value()
string get_result_value()
Prototype:
Verilog HDL: None
VHDL:
result_value
,
bfm_id
,
req_if(bfm_id)
Arguments:
Width of the data
(ci_data_t)
that can contain the following variables:
•
[Word_width-1:0]
•
Ext_width-1:0]
•
[Addr_width-1:0]
Returns:
Returns the instruction result.
Description:
Verilog HDL, VHDL
Language support:
Nios II Custom Instruction Master BFM
Altera Corporation
get_result_delay()
14-6
- MAX 10 JTAG (15 pages)
- MAX 10 Power (21 pages)
- Unique Chip ID (12 pages)
- Remote Update IP Core (43 pages)
- Device-Specific Power Delivery Network (28 pages)
- Device-Specific Power Delivery Network (32 pages)
- Hybrid Memory Cube Controller (69 pages)
- ALTDQ_DQS IP (117 pages)
- MAX 10 Embedded Memory (71 pages)
- MAX 10 Embedded Multipliers (37 pages)
- MAX 10 Clocking and PLL (86 pages)
- MAX 10 FPGA (26 pages)
- MAX 10 FPGA (56 pages)
- USB-Blaster II (22 pages)
- GPIO (22 pages)
- LVDS SERDES (27 pages)
- User Flash Memory (33 pages)
- ALTDQ_DQS2 (100 pages)
- Avalon Tri-State Conduit Components (18 pages)
- Cyclone V Avalon-MM (166 pages)
- Cyclone III FPGA Starter Kit (36 pages)
- Cyclone V Avalon-ST (248 pages)
- Stratix V Avalon-ST (286 pages)
- Stratix V Avalon-ST (293 pages)
- DDR3 SDRAM High-Performance Controller and ALTMEMPHY IP (10 pages)
- Arria 10 Avalon-ST (275 pages)
- Avalon Verification IP Suite (178 pages)
- FFT MegaCore Function (50 pages)
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- Floating-Point (157 pages)
- Integer Arithmetic IP (157 pages)
- Embedded Peripherals IP (336 pages)
- JESD204B IP (158 pages)
- Low Latency Ethernet 10G MAC (109 pages)
- LVDS SERDES Transmitter / Receiver (72 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (3 pages)
- Nios II Embedded Evaluation Kit Cyclone III Edition (80 pages)
- IP Compiler for PCI Express (372 pages)
- Parallel Flash Loader IP (57 pages)
- Nios II C2H Compiler (138 pages)
- RAM-Based Shift Register (26 pages)
- RAM Initializer (36 pages)
- Phase-Locked Loop Reconfiguration IP Core (51 pages)
- DCFIFO (28 pages)