Altera Avalon Verification IP Suite User Manual
Page 30

Description
Legal Values
Default
Value
Parameter
When On, the interface includes a
writeresponse
pin.
On/Off
Off
Use the write response
signals
When On, the interface includes a
readresponse
pin.
On/Off
Off
Use the read response
signals
When On, the interface includes a
clken
pin.
On/Off
Off
Use the clken signals
Port Polarity
When On,
reset
is asserted high.
On/Off
On
Assert reset high
When On,
waitrequest
is asserted high.
On/Off
On
Assert waitrequest high
When On,
read
is asserted high.
On/Off
On
Assert read high
When On,
write
is asserted high.
On/Off
On
Assert write high
When On,
byteenable
is asserted high.
On/Off
On
Assert byteenable high
When On,
readdatavalid
is asserted high.
On/Off
On
Assert readdatavalid
high
When On,
arbiterlock
is asserted high.
On/Off
On
Assert arbiterlock high
When On,
lock
is asserted high.
On/Off
On
Assert lock high
Burst Attributes
When On, the address for bursts wraps instead of
incrementing. With a wrapping burst, when the address
reaches a burst boundary, it wraps back to the previous
burst boundary. Consequently, only the low order bits
are used for addressing.
On/Off
On
Linewrap burst
When On, memory bursts are aligned to the address size.
On/Off
On
Burst on burst
boundaries only
Miscellaneous
The maximum number of pending reads that can be
queued by the slave.
N/A
1
Maximum pending
reads
Sets the read latency for fixed-latency slaves. Not used on
interfaces that include the
readdatavalid
signal.
N/A
1
Fixed read latency
(cycles)
For VHDL BFMs only. Use this option to assign a unique
number to each BFM in the testbench design.
0–1023
0
VHDL BFM ID
Timing
For master interfaces that do not use the
waitrequest
signal. The read wait time indicates the number of cycles
before the master responds to a read. The timing is as if
the master asserted
waitrequest
for this number of
cycles.
N/A
1
Fixed read wait time
(cycles)
For master interfaces that do not use the
waitrequest
signal. The write wait time indicates the number of cycles
before the master accepts a write.
N/A
0
Fixed write wait time
(cycles)
Avalon-MM Master BFM
Altera Corporation
Parameters
5-8