Altera Avalon Verification IP Suite - Manual (Page 37)

get_response_read_response()
bit[2**(AV_BURSTCOUNT_W-1) - 1:0] [AV_READRESPONSE_W-1:0] get_
response_read_response(int index)
Prototype:
Verilog HDL: int index
VHDL: response_read_response , int index , bfm_id , req_if(bfm_id)
Arguments:
AvalonReadResponse_t
Returns:
Returns the transaction read status in the response descriptor that has been
removed from the response queue. Description:
Verilog HDL, VHDL Language support:
get_response_request()
enum int[REQ_READ = 0, REQ_WRITE = 1, RED_IDLE = 2] get_response_
request()
Prototype:
Verilog HDL: None
VHDL:
response_request
,
bfm_id
,
req_if(bfm_id)
Arguments:
Request_t Returns:
Returns the transaction command type in the response descriptor that has been
removed from the response queue. Description:
Verilog HDL, VHDL Language support:
get_response_wait_time()
int get_response_wait_time(int index)
Prototype:
Verilog HDL:
index
VHDL:
response_wait_time
,
index
,
bfm_id
,
req_if(bfm_id)
Arguments:
int
Returns:
Returns the wait latency for transaction in the response descriptor that has been
removed from the response queue. Each cycle in a burst has its own wait latency
entry. Description:
Verilog HDL, VHDL Language support:
Altera Corporation Avalon-MM Master BFM
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5-15 get_response_read_response()