Altera Avalon Verification IP Suite - Manual (Page 35)

get_response_byte_enable()
bit [AV_NUMSYMBOLS-1:0] get_response_byte_enable(int index)
Prototype:
Verilog HDL: index
VHDL: response_byte_enable , index , bfm_id , req_if(bfm_id)
Arguments:
bit
Returns:
Returns the value of the byte enables in the response descriptor that has been
removed from the response queue. Each cycle of a burst response is addressed
individually by the specified index. Description:
Verilog HDL, VHDL Language support:
get_response_burst_size()
bit [AV_BURSTCOUNT_W-1:0]get_response_burst_size() Prototype:
Verilog HDL: None
VHDL:
response_burst_size
,
bfm_id
,
req_if(bfm_id)
Arguments:
bit
Returns:
Returns the size of the response transaction burst count in the response descriptor
that has been removed from the response queue. Description:
Verilog HDL, VHDL Language support:
get_response_data()
bit [AV_DATA_W-1:0] get_response_data(int index) Prototype:
Verilog HDL:
index
VHDL: response_data , index , bfm_id , req_if(bfm_id)
Arguments:
bit
Returns:
Returns the transaction read data in the response descriptor that has been removed
from the response queue. Each cycle in a burst response is addressed individually
by the specified index. In the case of read responses, the data is the data captured
on the
avm_readdata
interface pin. In the case of write responses, the data on the
driven avm_writedata pin is captured and reflected here.
Description:
Verilog HDL, VHDL Language support:
Altera Corporation Avalon-MM Master BFM
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5-13 get_response_byte_enable()