Reset source bfm, Parameters, Reset source api – Altera Avalon Verification IP Suite User Manual
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Reset Source BFM
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The Avalon Verification IP Suite includes a Reset Source BFM that you can use to generate a reset signal in
your testbench.
Parameters
Table 3-1: Reset Source BFM Parameter Settings
Description
Legal Values
Default Value
Option
Specifies the polarity of the reset signal. Turn on
this option to set the reset signal active high.
On/Off
On
Assert reset high
Specifies the number of cycles that the reset signal
is asserted at the initial stage of the simulation.
N/A
0
Cycles of initial
reset
Reset Source API
reset_assert
reset_assert
Prototype:
Verilog HDL: None
VHDL: N.A.
Arguments:
void.
Returns:
Asserts the reset signal.
Description:
Verilog HDL
Language support:
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