Altera Avalon Verification IP Suite - Manual (Page 152)

get_transaction_eop()
get_transaction_eop() Prototype:
Verilog HDL: None
VHDL: transaction_eop , bfm_id , req_if(bfm_id)
Arguments:
bit
. Returns:
Returns the transaction end of packet status in the most recently removed
transaction. Description:
Verilog HDL, VHDL Language support:
get_transaction_error()
get_transaction_error()
Prototype:
Verilog HDL: None
VHDL: transaction_error , bfm_id , req_if(bfm_id)
Arguments:
STError_t
. Returns:
Returns the error in the most recently removed transaction. Description:
Verilog HDL, VHDL Language support:
get_transaction_fifo_max()
int get_transaction_fifo_max()
Prototype:
Verilog HDL: None
VHDL: transaction_fifo_max , bfm_id , req_if(bfm_id)
Arguments:
int
. Returns:
Gets the maximum transaction FIFO depth. Description:
Verilog HDL, VHDL Language support:
get_transaction_fifo_threshold()
int get_transaction_fifo_threshold()
Prototype:
Verilog HDL: None
VHDL: transaction_fifo_threshold , bfm_id , req_if(bfm_id)
Arguments:
int
. Returns:
Gets the transaction FIFO threshold level. Description:
Verilog HDL, VHDL Language support:
Avalon-ST Monitor Altera Corporation
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get_transaction_eop() 10-16