Altera Avalon Verification IP Suite - Manual (Page 142)

set_enable_c_all_valid_beats()
set_enable_c_all_valid_beats() Prototype:
Verilog HDL:
Boolean
VHDL: N.A.
Arguments:
void
Returns:
Enables a coverage point that ensures test coverage for number of transaction
with all valid beats. Description:
Verilog HDL Language support:
set_enable_c_b2b_data_different_channel()
set_enable_c_b2b_data_different_channel()
Prototype:
Verilog HDL: Boolean
VHDL: N.A.
Arguments:
void
Returns:
Enables a coverage point that ensures back-to-back
valid
signals for different
channels. It is disabled when channels are not supported.
Description:
Verilog HDL Language support:
set_enable_c_b2b_data_same_channel()
set_enable_c_b2b_data_same_channel()
Prototype:
Verilog HDL: Boolean
VHDL: N.A.
Arguments:
void
Returns:
Enables a coverage point that ensures test coverage for back-to-back
valid
signals for the same channel. It is disabled when channels are not supported.
Description:
Verilog HDL Language support:
Avalon-ST Monitor Altera Corporation
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set_enable_c_all_valid_beats() 10-6