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Power management, 1 power management features, 1 early warning power-fail interrupt – Maxim Integrated High-Speed Microcontroller User Manual

Page 88: Figure 6-6. four-cycle movx instruction, Section, Precision voltage monitor

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High-Speed Microcontroller User’s Guide

Rev: 062210

88 of 176

7.

POWER MANAGEMENT

The high-speed microcontroller has several features that relate to power consumption and management.
They provide a combination of controlled operation in unreliable power applications and reduced power
consumption in portable or battery-powered applications. The range of features is shown below with
details to follow.

Power Management:
Early Warning Power-Fail Interrupt
Power-Fail/Power-On Reset
Bandgap Select
Watchdog Wake-Up from Idle

Power Saving:
Idle Mode
Stop Mode
Ring Wake-Up from Stop
Power Management Modes

Precision Voltage Monitor

The high-speed microcontroller uses a precision bandgap reference and other analog circuits to monitor
the state of the power supply during power-up and power-down transitions. Other microcontroller
systems would require external circuits to perform these functions. The bandgap reference provides a
precise voltage to compare with V

CC

. When V

CC

begins to drop, the power monitor compares it to its

reference. This enables the analog circuits to detect when V

CC

passes through predetermined thresholds,

V

PFW

and V

RST

. These are specified in the individual product data sheets.

7.1 Power Management Features

7.1.1 Early Warning Power-Fail Interrupt

Devices that incorporate the precision voltage reference have the ability to generate a power-fail interrupt
and/or reset in response to a low-supply voltage. When V

CC

reaches the V

PFW

threshold, the

microcontroller can generate a power-fail interrupt. This early warning of supply voltage failure allows
the system time to save critical parameters in nonvolatile memory and put external functions in a safe
state.

The power-fail interrupt is optional and is enabled using the enable power-fail warning interrupt (EPFI)
bit at

WDCON

.5. If enabled, V

CC

dropping below V

PFW

will cause the device to vector to address 33h.

The power-fail Interrupt status bit, PFI (

WDCON

.4), will be set anytime V

CC

transitions below V

PFW

.

This flag is not cleared when V

CC

is above V

PFW

, and software should clear it immediately after reading

it. As long as the condition exists, PFI will be immediately set again by hardware.

A typical application of the PFI is to place the device into a “safe mode” when a power loss appears
imminent. When the interrupt occurs, the code vectors to location 33h. At this time, software can disable
the interrupt, save any critical data, clear PFI, and then continually poll the status of the power supply via
the PFI flag. As long as PFI is set, power is still below V

PFW

. If power returns to the proper level, PFI will

not be set once cleared by software. This indicates a safe operating condition. If power continues to fall, a
power-fail reset will be invoked automatically.