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41 program status word (psw), Timer 2 capture lsb (rcap2l), Timer 2 capture msb (rcap2h) – Maxim Integrated High-Speed Microcontroller User Manual

Page 49: Timer 2 lsb (tl2), Timer 2 msb (th2)

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High-Speed Microcontroller User’s Guide

Rev: 062210

49 of 176

4.2.41

Program Status Word (PSW)

7 6 5 4 3 2 1 0

SFR D0h

CY

AC

F0

RS1 RS0 OV

F1 P

RW-0

RW-0

RW-0

RW-0

RW-0

RW-0

RW-0 RW-0

R = Unrestricted Read, W = Unrestricted Write, -n = Value after Reset

CY
Bit 7

Carry Flag. This bit is set when if the last arithmetic operation resulted in a carry
(during addition) or a borrow (during subtraction). Otherwise it is cleared to 0 by all
arithmetic operations.

AC
Bit 6

Auxiliary Carry Flag. This bit is set to 1 if the last arithmetic operation resulted in a
carry into (during addition), or a borrow (during subtraction) from the high order
nibble. Otherwise it is cleared to 0 by all arithmetic operations.

F0
Bit 5

User Flag 0. This is a bit-addressable, general-purpose flag for software control.

RS1, RS0
Bits 4, 3

Register Bank Select 1–0. These bits select which register bank is addressed during
register accesses.

RS1 RS0

REGISTER

BANK

ADDRESS

0 0 0

00h–07h

0 1 1

08h–0Fh

1 0 2

10h–17h

1 1 3

18h–1Fh

OV
Bit 2

Overflow Flag. This bit is set to 1 if the last arithmetic operation resulted in a carry
(addition), borrow (subtraction), or overflow (multiply or divide). Otherwise it is
cleared to 0 by all arithmetic operations.

F1
Bit 1

User Flag 1. This is a bit-addressable, general-purpose flag for software control.

P
Bit 0

Parity Flag. This bit is set to 1 if the modulo-2 sum of the eight bits of the accumulator
is 1 (odd parity); and cleared to 0 on even parity.