Maxim Integrated High-Speed Microcontroller - Manual (Page 151)

High-Speed Microcontroller User’s Guide
Rev: 062210 151 of 176
12.6 Multiprocessor Communication
Multiprocessor communication mode makes special use of the 9th data bit in Modes 2 and 3. In the
original 8051, the 9th bit was restricted to a 0 or 1 condition, but had no special purpose. In the 80C32
and the high-speed microcontroller, it can be used to signify that the incoming byte is an address. This
allows the processor to be interrupted only if the correct address appears. The receive interrupt, if
enabled, will only occur when a recognized address is received.
When a serial word is received with the 9th bit set and the appropriate SM2 = 1, the byte will be assumed
to be an address. The address will be compared to an internally stored address. If it matches, a receive
interrupt will occur. The internal address is derived from the contents of two registers. The first register
specifies an absolute address. This is the user-specified address of the device. The second register tells the
comparator which address bit(s) to actually use in the comparison. This allows broadcast transmissions
that reach groups of microcontrollers or all microcontrollers on a serial port. The user defines this
protocol.
There are two SFRs that support multiprocessor communication for each UART. These are independent,
so that different addresses can be used in each. The registers are SADDR0 or SADDR1 (hex address A9h
or AAh) and SADEN0 or SADEN1 (hex address B9h or BAh). The SADDR register specifies the
individual processor’s address. The SADEN identifies address bits that should be ignored in matching
addresses.
Software will write an 8-bit address to the SADDR register. This is the microcontroller’s individual
address. Any bit in SADEN that contains logic 0 will cause the corresponding bit in SADDR to be
ignored in comparison. Thus, logic 0 bits in SADEN create don’t care bit states for address comparisons.
When an address is received, each address bit that is not masked by a don’t care will be compared to the
SADDR. The microcontroller will interrupt on any address that matches this comparison. Any address
that meets this comparison is called a given address. The following example shows how one address can
be directed to an individual processor, or two out of three.
Micro 1
SADDR 11110000
SADEN 11111010
–––––––––––––––––––––––––
Given 11110x0x
Micro 2
SADDR 11110001
SADEN 11111001
–––––––––––––––––––––––––
Given 11110xx1
Micro 3
SADDR 11110010
SADEN 11111010
–––––––––––––––––––––––––
Given 11110x1x
Note that an address of 11110000 reaches only microcontroller 1. An address of 11110001 reaches
microcontroller 1 and microcontroller 2. An address of 11110010 reaches only microcontroller 3. The
microcontroller also matches on any address that corresponds to the broadcast address. This is the logical
OR of the SADDR and SADEN registers, with any zeros defined as don’t cares. In most cases, the
broadcast address will be FFh. The broadcast address feature is not available on the DS8xC520 or the
DS8xC530.