Maxim Integrated High-Speed Microcontroller - Manual (Page 3)

High-Speed Microcontroller User’s Guide
Rev: 062210 3 of 176
4.2.26 Interrupt Priority (IP)............................................................................................................................. 39
4.2.27 Slave Address Mask Enable Register 0 (SADEN0)............................................................................. 39
4.2.28 Slave Address Mask Enable Register 1 (SADEN1)............................................................................. 40
4.2.29 Serial Port Control (SCON1)................................................................................................................ 40
4.2.30 Serial Data Buffer 1 (SBUF1)............................................................................................................... 41
4.2.31 ROM Size Select (ROMSIZE) .............................................................................................................. 42
4.2.32 Power Management Register (PMR) ................................................................................................... 43
4.2.33 Status Register (STATUS) ................................................................................................................... 45
4.2.34 Timed Access Register (TA) ................................................................................................................ 46
4.2.35 Timer 2 Control (T2CON)..................................................................................................................... 46
4.2.36 Timer 2 Mode (T2MOD) ....................................................................................................................... 47
4.2.37 Timer 2 Capture LSB (RCAP2L).......................................................................................................... 48
4.2.38 Timer 2 Capture MSB (RCAP2H) ........................................................................................................ 48
4.2.39 Timer 2 LSB (TL2)................................................................................................................................ 48
4.2.40 Timer 2 MSB (TH2) .............................................................................................................................. 48
4.2.41 Program Status Word (PSW)............................................................................................................... 49
4.2.42 Watchdog Control (WDCON)............................................................................................................... 50
4.2.43 Accumulator (A or ACC) ...................................................................................................................... 51
4.2.44 Extended Interrupt Enable (EIE) .......................................................................................................... 52
4.2.45 B Register (B)....................................................................................................................................... 52
4.2.46 Real-Time Alarm Subsecond Register (RTASS) ................................................................................. 52
4.2.47 Real-Time Alarm Second Register (RTAS) ......................................................................................... 53
4.2.48 Real-Time Alarm Minute Register (RTAM) .......................................................................................... 53
4.2.49 Real-Time Alarm Hour Register (RTAH).............................................................................................. 53
4.2.50 Extended Interrupt Priority (EIP) .......................................................................................................... 54
4.2.51 Real-Time Clock Control Register (RTCC) .......................................................................................... 55
4.2.52 Real-Time Clock Subsecond Register (RTCSS) ................................................................................. 56
4.2.53 Real-Time Clock Second Register (RTCS).......................................................................................... 57
4.2.54 Real-Time Clock Minute Register (RTCM) .......................................................................................... 57
4.2.55 Real-Time Clock Hour Register (RTCH).............................................................................................. 57
4.2.56 Real-Time Clock Day Register 0 (RTCD0) .......................................................................................... 58
4.2.57 Real-Time Clock Day Register 1 (RTCD1) .......................................................................................... 58
4.3 I NSTRUCTION T IMING .....................................................................................................................58
4.4 A DDRESSING M ODES .....................................................................................................................59
4.4.1 Register Addressing............................................................................................................................. 59
4.4.2 Direct Addressing................................................................................................................................. 60
4.4.3 Register Indirect Addressing................................................................................................................ 60
4.4.4 Immediate Addressing ......................................................................................................................... 61
4.4.5 Register Indirect with Displacement..................................................................................................... 61
4.4.6 Relative Addressing ............................................................................................................................. 61
4.4.7 Page Addressing.................................................................................................................................. 61
4.4.8 Extended Addressing ........................................................................................................................... 62
4.5 P ROGRAM S TATUS F LAGS .............................................................................................................62
4.5.1 Bit Descriptions .................................................................................................................................... 62
5. CPU TIMING ..................................................................................................................63
5.1 O SCILLATOR ................................................................................................................................. 63
5.2 XTAL1.......................................................................................................................................... 63
5.3 XTAL2.......................................................................................................................................... 63
5.4 O SCILLATOR C HARACTERISTICS ....................................................................................................63
5.5 C RYSTAL S ELECTION .....................................................................................................................63
5.6 I NSTRUCTION T IMING .....................................................................................................................64
5.6.1 Single-Cycle Instructions ..................................................................................................................... 65
5.6.2 Two-Cycle Instructions......................................................................................................................... 65
5.6.3 Three-Cycle Instructions ...................................................................................................................... 67
5.6.4 Four-Cycle Instructions ........................................................................................................................ 68
5.6.5 Five-Cycle Instructions......................................................................................................................... 68
5.7 C OMPARISON TO THE 8051............................................................................................................71