Maxim Integrated High-Speed Microcontroller - Manual (Page 12)

High-Speed Microcontroller User’s Guide
Rev: 062210 12 of 176
3.2.7 Timer/Counters
Three 16-bit Timer/Counters are available in the high-speed microcontroller. Each timer is contained in
two SFR locations that can be written or read by software. The timers are controlled by other SFRs
described in Section
4 .
3.2.8 UARTs
The high-speed microcontroller provides one or two UARTs. These are controlled and accessed as SFRs.
Each UART has an address that is used to read or write the UART. Both read and write operations use the
same address. The microcontroller distinguishes between a read and a write by the instruction. Its own
SFR control register controls each UART.
3.2.9 Scratchpad Registers (RAM)
The high-speed core provides 256 bytes of Scratchpad RAM for general-purpose data and variable
storage. The first 128 bytes are directly available to software. The second 128 are available through
indirect addressing discussed below. Selected portions of this RAM have other optional functions.
3.2.10 Stack
The stack is a RAM area that the microcontroller uses to store return address information during Calls
and Interrupts. The user can also place variables on the stack when necessary. The stack pointer
mentioned above designates the RAM location that is the top of the stack. Thus, depending on the value
of the stack pointer, the stack can be located anywhere in the 256 bytes of RAM. A common location
would be in the upper 128 bytes of RAM, as these are accessible through indirect addressing only.
3.2.11 Working Registers
The first 32 bytes of the Scratchpad RAM can be used as four banks of eight Working Registers for high-
speed data movement. Using four banks, software can quickly change context by simply changing to a
different bank. In addition to the Accumulator, the working registers are commonly used as data source or
destination. Some of the working registers can also be used as pointers to other RAM locations (indirect
addressing).
3.2.12 Program Counter
The Program Counter (PC) is a 16-bit value that designates the next program address to be fetched. On-
chip hardware automatically increments the PC value to move to the next ROM location.
3.2.13 Address/Data Bus
The high-speed microcontroller addresses a 64kB program and 64kB data memory area. In the ROMless
versions, all memory is outside. Other versions use a combination of internal and external memory. When
external memory is accessed, Ports 0 and 2 are used as a multiplexed address and data bus. Port 2
provides the address MSB. Even versions with internal memory can use the bus on Ports 0 and 2 to
access more memory.
3.2.14 Watchdog Timer
The watchdog timer provides a supervisory function for applications that cannot afford to run out of
control. The watchdog timer is a programmable free-running timer. If allowed to reach the termination of
its count, if enabled, the watchdog resets the CPU. Software must prevent this by cleaning or resetting the
watchdog prior to its timeout.
3.2.15 Power Monitor
Some members of the high-speed microcontroller family incorporate a bandgap reference and analog
circuitry to monitor the power supply conditions. When V
CC
begins to drop out of tolerance, the power
monitor issues an optional early warning power-fail interrupt. If power continues to fall, the power