Maxim Integrated High-Speed Microcontroller - Manual (Page 115)

High-Speed Microcontroller User’s Guide
Rev: 062210 115 of 176
A more practical application is the optional use of an interrupt. If INT0 (P3.2) is enabled, then an
externally imposed logic 0 will cause an interrupt. By then disabling the INT0, P3.2 can be used as a
general-purpose I/O pin. This allows INT0 to be used to “wake up” the system, but does not eliminate
another use of the pin.
10.4 Output Functions
Although 8051 I/O ports appear to be true I/O, their output characteristics are dependent on the individual
port and pin conditions. When software writes a logic 0 to the port for output, the port is pulled to ground.
When software writes a logic 1 to the port for output, Ports 1, 2, or 3 will drive weak pullups (after the
strong transition from 0 to 1). Port 0 will go three-state. Thus as long as the port is not heavily loaded,
true logic values will be output. DC drive capability is provided in the electrical specifications. Note that
the DC current available from an I/O port pin is a function of the permissible voltage drop.
Transition current is available to help move the port pin from a 0 to a 1. Since the logic 0 driver is strong,
no additional drive current is needed in the 1 to 0 direction. The transition current is applied when the port
latch is changed from a logic 0 to a logic 1. Simply writing a logic 1 where a 1 was already in place does
not change the strength of the pullup. This transition current is applied for one-half a machine cycle. The
absolute current is not guaranteed, but is approximately 2mA at 5V.
When serving as an I/O port, the drive will vary as follows. For a logic 0, the port will invoke a strong
pulldown. For a logic 1, the port will invoke a strong pullup for two oscillator cycles to assist with the
logic transition. Then, the port will revert to a weak pullup. This weak pullup will be maintained until the
port transitions from a 1 to a 0. External circuits can overdrive the weak pullup. This allows the output 1
state to serve as the input state as well.
Substantial DC current is available in both the high and low levels. However, the power dissipation
limitations make it inadvisable to heavily load multiple pins. In general, sink and source currents should
not exceed 10mA total per port (8 bits) and 25mA total per package.
10.5 Current-Limited Transitions
The high-speed microcontroller family incorporates special circuitry to limit the current consumed by the
device
when the expanded memory bus is used. These signals employ current-limited drivers that “step”
the transition from a logic 0 to a logic 1 to reduce ringing and electromagnetic interference. When
expanded memory operations are in progress, the following pins will exhibit the current-limiting feature:
Port 0
Port 2
PSEN (During program memory accesses)
ALE
RD (During data memory read cycles)
WR (During data memory write cycles)
10.6 Input Functions
The input state of the I/O ports is the same as that of the output logic 1. That is, the pin is pulled weakly
to a logic 1. This 1 state is easily overcome by external components. Thus, after software writes a 1 to the
port pin, the port is configured for input. When the port is read by software, the state of the pin will be
read. The only exception is the read-modify-write instructions described below. If the external circuit is
driving a logic 1, then the pin will be a logic 1. If the external circuit is driving a 0, then it will overcome
the internal pullup. The pin will be the same as the driven logic state. Note that the port latch is not