Maxim Integrated High-Speed Microcontroller - Manual (Page 129)

High-Speed Microcontroller User’s Guide
Rev: 062210 129 of 176
11.7.4 Up/Down Count Auto-Reload Timer/Counter
The up/down auto-reload counter option is selected by the DCEN (T2MOD.0) bit, and is illustrated in
Figure 11-5 . When DCEN is set to a logic 1, Timer 2 will count up or down as controlled by the state of
pin T2EX (P1.1). T2EX will cause upward counting when a logic 1 is applied and down counting when a
logic 0 is applied. When DCEN = 0, Timer 2 only counts up.
When an upward counting overflow occurs, the value in RCAP2L and RCAP2H will load into T2L and
T2H. In the down count direction, an underflow occurs when T2L and T2H match the values in RCAP2L
and RCAP2H, respectively. When an underflow occurs, FFFFh is loaded into T2L and T2H and counting
continues.
Note that in this mode, the overflow/underflow output of the timer is provided to an edge detection circuit
as well as to the TF2 bit (
T2CON .7). This edge detection circuit toggles the EXF2 bit ( T2CON .6) on
every overflow or underflow. Therefore, the EXF2 bit behaves as a 17th bit of the counter, and may be
used as such.
11.7.5 Baud-Rate Generator
Timer 2 can be used to generate baud rates for Serial Port 0 in serial modes 1 or 3. Baud-rate generator
mode is invoked by setting either the RCLK or TCLK bit in the
T2CON register to a logic 1, as illustrated
in Figure 11-6 . In this mode, the timer continues to function in auto-reload mode, but instead of setting
the interrupt flag T2F ( T2CON .7) and potentially causing an interrupt, the overflow generates the shift
clock for the serial port function. As in normal auto-reload mode, an overflow causes RCAP2L and
RCAP2H to be transferred into T2L and T2H, respectively. Note that when RCLK or TCLK is set to 1,
the Timer 2 is forced into 16-bit auto-reload mode regardless of the CP/
RL2 bit.
As explained above, the timer itself cannot set the T2F interrupt flag and therefore cannot generate an
interrupt. However if EXEN2 (
T2CON .3) is set to 1, a 1-to-0 transition on the T2EX (P1.1) pin will cause
the EXF2 ( T2CON .6) interrupt flag to be set. If enabled, this will cause a Timer 2 Interrupt to occur.
Therefore in this mode, the T2EX pin may be used as an additional external interrupt if desired.
Another feature of the baud-rate generator mode is that the crystal derived time base for the timer is the
crystal frequency divided by 2. No other crystal divider selection is possible. If a different time base is
desired, bit C/
T2 ( T2CON .1) may be set to a 1 sourcing the time base from an external clock source
supplied by the user on pin T2 (P1.0). Software should not access TL2 or TH2 while the timer is running
(TR2 = 1) in baud-rate generator mode. In this mode the timer is clocking so fast that a software read of
or write to the
TL2 and TH2 registers may corrupt the timer. The RCAP registers may be read, but not
modified, while TR2 = 1. Stop the timer (TR2 = 0) to modify these registers.