3 power control register (pcon; 87h), 4 watchdog control register (wdcon; d8h), 5 timer two control register ( t2con; c8h) – Maxim Integrated High-Speed Microcontroller User Manual
Page 140: 3 baud rates, 1 mode 0, Serial port control 1 register (scon1; c0h)
High-Speed Microcontroller User’s Guide
Rev: 062210
140 of 176
12.2.3
Power Control Register (PCON; 87h)
.7: Serial Port 0 Baud-Rate Doubler Enable (SMOD_0). Doubles the serial baud rate in modes
1, 2, and 3 for Serial Port 0 (the standard port) when SMOD = 1.
.6: Framing Error-Detection Enable (SMOD0). When SMOD0 is set to 1,
.7 are converted to the FE flag for the respective serial port. When SMOD0 is 0, then
.7 are the SM0 function as defined for the serial port.
12.2.4
Watchdog Control Register (WDCON; D8h)
.7: Serial Modification (SMOD_1). When set to logic 1, this bit doubles the baud rate of Serial
Port 1. It works identically to
.7.
12.2.5
Timer Two Control Register ( T2CON; C8h)
.5: Receive Clock Flag (RCLK). This bit determines whether Timer 1 or 2 is used for Serial
Port 0 timing of received data in Serial Modes 1 or 3. RCLK = 1 causes Timer 2 overflow to be used as
the receive clock. RCLK = 0 causes Timer 1 overflow to be used as the receive clock.
.4: Transmit Clock Flag (TCLK). This bit determines whether Timer 1 or 2 is used for Serial
Port 0 timing of Transmit data in Serial Modes 1 or 3. TCLK = 1 causes Timer 2 overflow to be used as
the transmit clock. TCLK = 0 causes Timer 1 overflow to be used as the transmit clock.
12.3 Baud Rates
Each mode has a baud-rate generator associated with it. This generator is generally the same for each
UART. Several of the baud-rate generation techniques have options and these options are independent for
the two UARTs. The baud-rate descriptions given below are separated by mode.
12.3.1
Mode 0
Baud rates for this mode are driven directly from the crystal speed divided by either 12 or 4. Mode 0 is
synchronous so that the shift clock output frequency will be the baud rate. The formula is simply as
follows:
Oscillator Frequency
Mode 0 Baud Rate =
12
or
Oscillator
Frequency
Mode 0 Baud Rate =
4
The default case is divide-by-12. The user can select by using the SM2 bit in the associated SCON
register. For Serial Port 0, the SM2_0 bit is
.5. For Serial Port 1, the SM2_0 bit is
.5.
When SM2 is set to logic 0, the baud rate is generated using a divide-by-12 of the oscillator input. When
SM2 is set to logic 1, the baud rate is generated using divide-by-4. Note that this use of SM2 differs from
a standard 80C32. In that device, SM2 had no valid use when the UART was in Mode 0. Since it was
generally set to a 0, for the divide-by-12, there is no compatibility problem.