beautypg.com

2 special function registers, Figure 4-2. register map, Figure 4-3. scratchpad register addressing – Maxim Integrated High-Speed Microcontroller User Manual

Page 17

background image

High-Speed Microcontroller User’s Guide

Rev: 062210

17 of 176

4.2 Special Function Registers

The high-speed microcontroller, like the 8051, uses special function registers (SFRs) to control
peripherals and modes. In many cases, an SFR will control individual functions or report status on
individual functions. The SFRs reside in register locations 80h–FFh and are reached using direct
addressing. SFRs that end in 0 or 8 are bit addressable.

All standard SFR locations from the original 8051 are duplicated in the high-speed microcontroller, with
several additions. Following tables illustrate the locations of the SFRs for various devices. Following
each tables a description of the default-reset conditions of all SFR bits. The following information
contains detailed descriptions of each SFR.

Table 4-A. DS80C310 SFR Locations

REGISTER

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

ADDRESS

SP

SP.7 SP.6 SP.5 SP.4 SP.3 SP.2 SP.1 SP.0 81h

DPL

DPL.7 DPL.6 DPL.5 DPL.4 DPL.3 DPL.2 DPL.1 DPL.0

82h

DPH

DPH.7 DPH.6 DPH.5 DPH.4 DPH.3 DPH.2 DPH.1 DPH.0

83h

DPL1

DPL1.7 DPL1.6 DPL1.5 DPL1.4 DPL1.3 DPL1.2 DPL1.1 DL1H.0

84h

DPH1

DPH1.7

DPH1.6 DPH1.5 DPH1.4 DPH1.3 DPH1.2 DPH1.1 DPH1.0

85h

DPS

0 0 0 0 0 0 0

SEL

86h

PCON

SMOD_0 SMOD0

GF1

GF0

STOP IDLE

87h

TCON

TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 88h

TMOD

GATE C/

T

M1 M0

GATE

C/

T M1 M0 89h

TL0

TL0.7 TL0.6 TL0.5 TL0.4 TL0.3 TL0.2 TL0.1 TL0.0 8Ah

TL1

TL1.7 TL1.6 TL1.5 TL1.4 TL1.3 TL1.2 TL1.1 TL1.0 8Bh

TH0

TH0.7 TH0.6 TH0.5 TH0.4 TH0.3 TH0.2 TH0.1 TH0.0 8Ch

TH1

TH1.7 TH1.6 TH1.5 TH1.4 TH1.3 TH1.2 TH1.1 TH1.0 8Dh

CKCON

— — T2M T1M T0M MD2 MD1 MD0 8Eh

P1

P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 90h

EXIF

IE5 IE4 IE3 IE2 — — — — 91h

SCON0

SM0/FE_0 SM1_0 SM2_0 REN_0 TB8_0 RB8_0 TI_0

RI_0

98h

SBUF0

SBUF0.7 SBUF0.6 SBUF0.5 SBUF0.4 SBUF0.3 SBUF0.2 SBUF0.1 SBUF0.0

99h

P2

P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0 A0h

IE

EA — ET2 ES0 ET1 EX1 ET0 EX0 A8h

SADDR0

SADDR0.7 SADDR0.6 SADDR0.5 SADDR0.4 SADDR0.3 SADDR0.2 SADDR0.1 SADDR0.0

A9h

P3

P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 B0h

IP

— — PT2 PS0 PT1 PX1 PT0 PX0 B8h

SADEN0

SADEN0.7 SADEN0.6 SADEN0.5 SADEN0.4 SADEN0.3 SADEN0.2 SADEN0.1 SADEN0.0

B9h

STATUS

0

HIP

LIP 1 1 1 1 1 C5h

T2CON

TF2 EXF2 RCLK

TCLK

EXEN2 TR2 C/

T2

CP/

RL2

C8h

T2MOD

— — — — — —

T2OE

DCEN

C9h

RCAP2L

RCAP2L.7 RCAP2L.6 RCAP2L.5 RCAP2L.4 RCAP2L.3 RCAP2L.2 RCAP2L.1 RCAP2L.0

CAh

RCAP2H

RCAP2H.7 RCAP2H.6 RCAP2H.5 RCAP2H.4 RCAP2H.3 RCAP2H.2 RCAP2H.1 RCAP2H.0

CBh

TL2

TL2.7 TL2.6 TL2.5 TL2.4 TL2.3 TL2.2 TL2.1 TL2.0 CCh

TH2

TH2.7 TH2.6 TH2.5 TH2.4 TH2.3 TH2.2 TH2.1 TH2.0 CDh

PSW

CY AC F0 RS1 RS0 OV F1 P D0h

WDCON

— POR — — — — — — D8h

ACC

ACC.7 ACC.6 ACC.5 ACC.4 ACC.3 ACC.2 ACC.1 ACC.0

E0h

EIE

— — — — EX5

EX4

EX3

EX2 E8h

B

B.7 B.6 B.5 B.4 B.3 B.2 B.1 B.0 F0h

EIP

— — — — PX5

PX4 PX3 PX2 F8h