Maxim Integrated High-Speed Microcontroller - Manual (Page 79)

High-Speed Microcontroller User’s Guide
Rev: 062210 79 of 176
Fast slew rates allow the maximum possible time for memory access. In most cases, however, these
aspects will be transparent to the user. Refer to the electrical specifications for exact timing of each
product.
6.4 Data Memory Interconnect
As described in Section 4 , the high-speed microcontroller provides a small amount of RAM mapped as
registers for on-chip direct access. This is not considered data memory and does not fall into the memory
map. Systems that require more RAM or memory mapped peripherals must use the data memory area.
This segment is a 64kB space located between 0000h and FFFFh. It is reached using the MOVX
instruction. Any use of this instruction automatically accesses the data area. Although, the original 8051
convention placed all data memory off-chip, many members of the high-speed microcontroller family
contain some data memory on-chip.
From a software standpoint, the physical location of the data area is not relevant because the same
instructions are used. Like the program segment, if software accesses a data address that is above the on-
chip data area, this access will automatically be routed to the expanded bus. Thus data or peripherals that
are off-chip can be used in conjunction with on-chip memory by selecting addresses that do not overlap.
As an example, if the microcontroller has 1kB of on-chip data memory, then a MOVX instruction at
location 0400h will be directed off-chip via the expanded bus.
The physical connection of off-chip data memory is shown in
Figure 6-3 . This illustrates a DS80C320
with interfaced with an 8kB SRAM. The data memory map begins at address 0000h since the DS80C320
has no on-chip data memory. A similar interconnection scheme would be implemented if a device with
internal data memory, such as the DS87C520 would be used. Note that any external memory that
overlapped the range of on-chip data memory would not be used.