Maxim Integrated High-Speed Microcontroller - Manual (Page 147)

High-Speed Microcontroller User’s Guide
Rev: 062210 147 of 176
12.4.3 Mode 2
This mode uses a total of 11 bits in asynchronous full-duplex communication as illustrated in Figure 12-3 .
The 11 bits consist of one start bit (a logic 0), 8 data bits, a programmable 9th bit, and one stop bit (a
logic 1). Like Mode 1, the transmissions occur on the TXD signal pin and receptions on RXD. For
transmission purposes, the 9th bit can be stuffed as logic 0 or 1. A common use is to put the parity bit in
this location. The 9th bit is transferred from the TB8 bit position in the SCON register (
SCON0 .3 or
SCON1 .3) during the write to SBUF. Baud rates are generated as a fixed function of the crystal frequency
as described above. Like Mode 1, Mode 2’s transmission begins 5 oscillator cycles after the first rollover
of the divide-by-16 counter following a software write to SBUF. It begins by the start bit being placed on
the TXD pin. The data is then shifted out onto the pin LSb first, followed by the 9th bit, and finally the
stop bit. The TI bit (
SCON0 .1 or SCON1 .1) is set when the stop bit is placed on the pin.