Teledyne LeCroy Summit T28 PCIe Multi-lane Protocol Analyzer User Manual - Manual (Page 11)

Summit T28 PCI Express Multi‐Lane Protocol Analyzer User Manual xi
Contents Teledyne LeCroy
10.9 Detail View......................................................................................................................... 194
10.10 LTSSM Flow Graph......................................................................................................... 195
10.11 Packet Header Bar.......................................................................................................... 196
10.12 Packet Data Window....................................................................................................... 197
10.13 Configuration Space View ............................................................................................. 198
10.14 Using Unit Metrics .......................................................................................................... 199
10.15 Metrics Defined for Link Transactions ......................................................................... 200
10.15.1 Metrics Defined for Split Transactions.........................................................................................200
10.16 Show Metrics in the CATC Trace Display..................................................................... 200
10.16.1 Collapsed Metrics Header Display................................................................................................200
10.16.2 Metrics Tool Tip Display ................................................................................................................201
10.16.3 Expanded Metrics Header Display................................................................................................201
10.17 Show Metrics in the Traffic Summary Window............................................................ 202
10.17.1 Reports at Split Transaction Level ...............................................................................................202
10.17.2 Reports at the Link Transaction Level .........................................................................................203
10.18 Show Metrics in the Bus Utilization Window ............................................................... 203
10.18.1 Unit-Based Averaging ....................................................................................................................204
10.18.2 Bus Utilization Window Features..................................................................................................205
10.18.3 Split Transaction Level Graphs.....................................................................................................205
10.18.4 Link Transaction Level Graphs .....................................................................................................206
10.19 Real-Time Statistics Window......................................................................................... 206
10.19.1 Real-Time Statistics Buttons.........................................................................................................207
10.19.2 Real-Time Statistical Monitor Pop-up Menu ................................................................................209
10.19.3 Real-Time Statistics Graph Areas.................................................................................................210
10.20 Memory I/O Space Editor ............................................................................................... 212
10.21 TC to VC Mapping........................................................................................................... 212
10.22 Timing and Bus Usage Calculations............................................................................. 213
10.22.1 Bus Utilization.................................................................................................................................213
10.22.2 Split Transaction Performance .....................................................................................................214
10.22.3 Memory Writes Performance.........................................................................................................214
10.23 PCIe SSD Base Address Mapping................................................................................. 215
10.23.1 NVMe PCIe SSD Device Configuration .........................................................................................215
10.23.2 PQI PCIe SSD Device Configuration.............................................................................................218
10.24 Running Verification Scripts ......................................................................................... 221
Chapter 11: Updates and Licensing ..................................................................225
11.1 Updating the Analyzer...................................................................................................... 225
11.2 License Keys..................................................................................................................... 225