Epson S1D13705 - Manual (Page 320)

Page 8 Epson Research and Development
Vancouver Design Center
S1D13705 S5U13705B00C Rev. 2.0 Evaluation Board User Manual
X27A-G-014-02 Issue Date: 2002/09/16
2 Features
Following are some features of the S5U13705B00C Rev. 2.0 Evaluation Board:
• 80-pin TQFP S1D13705F00A Embedded Memory LCD Controller with 80K bytes of
embedded SRAM.
• Headers for connecting to various Host Bus Interfaces.
• Configuration options.
• Adjustable positive LCD bias power supply from +23V to +40V.
• Adjustable negative LCD bias power supply from -23V to -14V.
• 4/8-bit 3.3V or 5V single monochrome or color passive LCD panel support.
• 9/12-bit 3.3V or 5V active matrix TFT LCD panel support.
• Software and hardware initiated power save mode.
• Selectable clock source for bus clock and CLKI.
• External oscillator for CLKI (up to 50MHz with internal clock divider or 25MHz with
no internal clock divider) and BUSCLK.