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4 cpu/bus interface connector pinouts, Table 41: cpu/bus connector (h1) pinout – Epson S1D13705 User Manual

Page 299

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Epson Research and Development

Page 11

Vancouver Design Center

S5U13705B00C Rev. 1.0 ISA Bus Evaluation Board User Manual

S1D13705

Issue Date: 01/02/13

X27A-G-005-03

4 CPU/Bus Interface Connector Pinouts

Table 4-1: CPU/BUS Connector (H1) Pinout

Connector

Pin No.

CPU/BUS
Pin Name

Comments

1

SD0

Connected to DB0 of the S1D13705

2

SD1

Connected to DB1 of the S1D13705

3

SD2

Connected to DB2 of the S1D13705

4

SD3

Connected to DB3 of the S1D13705

5

GND

Ground

6

GND

Ground

7

SD4

Connected to DB4 of the S1D13705

8

SD5

Connected to DB5 of the S1D13705

9

SD6

Connected to DB6 of the S1D13705

10

SD7

Connected to DB7 of the S1D13705

11

GND

Ground

12

GND

Ground

13

SD8

Connected to DB8 of the S1D13705

14

SD9

Connected to DB9 of the S1D13705

15

SD10

Connected to DB10 of the S1D13705

16

SD11

Connected to DB11 of the S1D13705

17

GND

Ground

18

GND

Ground

19

SD12

Connected to DB12 of the S1D13705

20

SD13

Connected to DB13 of the S1D13705

21

SD14

Connected to DB14 of the S1D13705

22

SD15

Connected to DB15 of the S1D13705

23

RESET#

Connected to the RESET# signal of the S1D13705

24

GND

Ground

25

GND

Ground

26

GND

Ground

27

+12V

12 volt supply

28

+12V

12 volt supply

29

WE0#

Connected to the WE0# signal of the S1D13705

30

WAIT#

Connected to the WAIT# signal of the S1D13705

31

CS#

Connected to the CS# signal of the S1D13705

32

NC

Not connected

33

WE1#

Connected to the WE1# signal of the S1D13705

34

IOVDD

Connected to the IOVDD supply of the S1D13705