Echelon Series 6000 Chip databook - Manual (Page 9)

Comparison with FT 3120 or FT 3150 Devices ............................. 55
Comparison with Series 5000 Devices ........................................... 56
Comparison with the FTT-10A Transceiver .................................. 56
Connection for a Neuron 6000 Processor ............................................. 57
TPT/XF-1250 Transceivers ............................................................. 57
EIA-485 Transceivers ..................................................................... 58
LPT-11 Link Power Transceivers .................................................. 59
Clock Requirements ..................................................................................... 61
External Crystal .................................................................................... 61
Comparison with Series 3100 Clocks ................................................... 62
Reset Function.............................................................................................. 63
RST~ Pin ................................................................................................ 63
Reset Sources ......................................................................................... 64
Power-Up and LVI .......................................................................... 65
Watchdog Timer .............................................................................. 65
Traps ................................................................................................ 66
Software-Controlled Reset .............................................................. 66
Reset Processes and Timing ................................................................. 66
SVC~ Pin ...................................................................................................... 69
Integrity Mechanisms .................................................................................. 70
Processor Integrity ................................................................................ 70
System Firmware Image ....................................................................... 70
Application Integrity Using Checksums .............................................. 70
Hardware Design Considerations ............................................................... 73
PC Board Layout Guidelines ....................................................................... 74
Design and Test for Electromagnetic Compatibility ............................. 77
Overview ....................................................................................................... 78
Achieving High Immunity ........................................................................... 79
Electrostatic Discharge ................................................................................ 79
Electromagnetic Interference ...................................................................... 80
Radiated and Conducted Immunity ............................................................ 82
Surge and Burst ........................................................................................... 85
Lightning Protection .................................................................................... 86
Building Entrance Protection ............................................................... 86
Network Line Protection ....................................................................... 86
Shield Protection ................................................................................... 86
Suggested Gas Discharge Arresters ..................................................... 86
Avoiding Magnetic Field Interference ........................................................ 88
Summary and Testing Results .................................................................... 89
Network Cabling and Connections for FT Devices ................................ 91
Network Connection .................................................................................... 92
Network Topology Overview ....................................................................... 92
System Performance and Cable Selection .................................................. 94
System Specifications ............................................................................ 95
Transmission Distance Specifications .................................................. 95
Cable Termination and Shield Grounding ................................................. 96
Free Topology Network Segment ......................................................... 96
Doubly Terminated Bus Topology Segment ........................................ 96
Grounding Shielded Twisted Pair Cable .............................................. 97
Input/Output Interfaces for the Series 6000 ............................................ 99
Overview ..................................................................................................... 100
Series 6000 Chip Data Book ix