Echelon Series 6000 Chip databook - Manual (Page 113)

Figure 43. Timer/Counter Circuits
No I/O pins are dedicated to timer/counter functions. If, for example, Timer/Counter 1 is used
for input signals only, then IO0 is available for other input or output functions. Clock and
enable inputs for the timer/counters can be from external pins, or from scaled clocks derived
from the system clock. The clock rates of the two timer/counters are independent of each
other. External clock actions occur optionally on the rising edge, the falling edge, or both
edges of the input.
Series 6000 chips also support up to one application-specific interrupt task per
Timer/Counter unit. These interrupts are triggered by a condition selected through the
choice of I/O object that uses the Timer/Counter unit; see the Neuron C Programmer’s Guide
for more information about timer/counter interrupts.
See the I/O Model Reference for Smart Transceivers and Neuron Chips for more information
about how to use the timer/counters.
Summary of the Available I/O Objects
Many I/O models are available for Neuron Chips and Smart Transceivers. Certain I/O
models are available only for specific chip types, but most are available to all Neuron Chips
and Smart Transceivers. For detailed information please see the I/O Model Reference for
Neuron Chips and Smart Transceivers. The I/O models are grouped into the following
categories:
• Direct I/O Models are based on a logic level at the I/O pins; none of the Neuron Chip
or Smart Transceiver hardware's timer/counters are used in conjunction with these
I/O models. These models can be used in multiple, overlapping combinations within
the same Neuron Chip or Smart Transceiver. Direct I/O models include the following
types:
Input Model Types Output Model Types
bit bit
byte byte
leveldetect nibble
nibble touch
touch
Series 6000 Chip Data Book 101