Echelon Series 6000 Chip databook - Manual (Page 87)

opportunity to run through the Series 6000 chip itself, and any other circuitry, such as
a host microprocessor.
Transceiver-Side Clamp Diodes: Two diodes clamp the FT 6000 Smart Transceiver side
of the FT-X3 transformer between V
DD33
and ground. The V
DD33
and ground connections
between the diodes and the transformer must be made with short, wide traces using a
low inductance technique, which ensures that the secondary transient energy
(remaining after the primary discharge through the MOV) does not disrupt the FT
Smart Transceiver. The V
DD33
and ground connections of the diodes are designed to
return transient currents to the star-ground center point.
Network-Side Clamp Diodes: Four diodes clamp the network side of the FT-X3
transformer to ground through the MOV during ESD and surge transients. The
connections between the diodes and the MOV must be made using low inductance
traces, which ensures that secondary transient energy remaining after the primary
discharge through the MOV does not disrupt the FT Smart Transceiver. The
connection of the MOV is designed to return transient currents to the star-ground
center point.
Ground Return for a Series 6000 Chip: The FT 6000 Smart Transceiver has internal
protection circuitry built into its NETP and NETN pins (the CP0 and CP1 pins for a
Neuron 6000 Processor). When an ESD or surge transient comes in from the network,
the portion of the transient that makes it to the Series 6000 chip is clamped to the
chip’s V
DD33
power pins and ground pins. V
DD33
is bypassed to ground at the Series 6000
chip, so the transient current returns to the center of the star ground through the
ground layer for a 4-layer PCB, or the ground pours for a 2-layer PCB. Be sure to
provide a short and wide ground path from the Series 6000 chip back to the center of
the star ground.
Ground Planes: As ground is routed from the center of the star out to the function blocks
on the board, planes or very wide traces should be used to lower the inductance (and
therefore the impedance) of the ground distribution system.
V
DD33
Decoupling Capacitors: A good rule of thumb is to provide at least one V
DD3
decoupling capacitor to ground for each V
DD33
power pin on an IC in the design. For
SMT devices like a Series 6000 chip, each decoupling capacitor should be placed on the
top layer with the chip, and placed as close as possible to the chip to minimize the
length of V
DD33
trace between the capacitor and the chip’s V
DD33
pad. The ground end of
the capacitor should have a wide, short connection to ground. Keeping these
connections short and wide reduces their inductance, which improves the effectiveness
of the decoupling. SMT capacitors with a value of 0.1 μF work well for decoupling, as
long as the connections are kept very short. If you use ESD clamp diodes between V
DD33
and ground on I/Os, there should generally be at least one decoupling capacitor for
every two diode clamps, placed very close to those diode clamps.
Host Microprocessor Kept Away From Network Connection: The (optional) host
microprocessor (for a ShortStack device or an FTXL device) is a potential source of
digital noise that could cause radiated EMI problems if that noise is allowed to couple
onto the external network, power, or I/O wiring. To help prevent this coupling, the host
microprocessor and any other noisy digital circuitry should be kept away from the
network side of the Series 6000 chip. For example, place the host microprocessor on the
opposite side of the Series 6000 chip from the network, power, and I/O connectors.
Figure 30 shows a portion of the top layer of a 4-layer printed circuit board (PCB) layout for
the FT 6000 Smart Transceiver, along with the other building blocks of a PCB design. A
PCB layout for a Neuron 6000 Processor would be similar to that shown in Figure 30.
Series 6000 Chip Data Book 75