Echelon Series 6000 Chip databook - Manual (Page 86)

PC Board Layout Guidelines
Electrostatic discharge (ESD) and electromagnetic interference (EMI) are two of the most
important design considerations when laying out the PCB for a device. See Chapter 4,
Design and Test for Electromagnetic Compatibility, for more information about ESD and EMI
design considerations.
Tolerance of ESD and other types of network transients requires careful layout for power,
ground, and other device circuitry. In general, ESD currents return to Earth ground or to
other nearby metal structures. The device’s ground scheme must be able to pass this ESD
current between the network connection and the device’s external ground connection without
generating significant voltage gradients across the device’s PCB. The low-inductance star-
ground configuration accomplishes this task. The star-ground configuration conducts
transients out of the device with minimal disruption to other function blocks.
The following list describes the general features of a careful PCB design layout for FT 6000
Smart Transceivers and Neuron 6000 Processors:
Star-Ground Configuration: The various blocks of the device that directly interface with
off-board connections (the network, any external I/O, and the power supply cable)
should be arranged so that the connections are together along one edge of the PCB.
This arrangement allows any transient current that comes in by one connection to flow
back out of the device by one of the other connections.
If connection is made between the PCB ground and a metal enclosure, that connection
should be made using a low-inductance connection (like a short standoff) in the center
of the star ground. The center of the star ground is anywhere within the common
ground area around the off-board connections.
For a 4-layer PCB, the ground plane serves to distribute ground from the center of the
star ground out to the various function blocks in the floorplan. For a 2-layer PCB,
ground pours should be placed on the bottom layer (and also on the top layer where
possible) in order to connect the grounds of the various function blocks to the center of
the star ground.
EMC Keepout Area: The area around the FT 6000 Smart Transceiver network connection
traces and components should be considered “ESD Hot”, and other traces and
components (and inner planes) should be kept at least 3.5 mm (0.14 inch) away from
the network connection traces and components to prevent ESD arc-overs. In addition,
digital signal traces (and other high-speed switching signal traces) should be routed
around this keep out area. If you route signals under this area, be sure to add a return
plane (ground or power) between the network connection trace layer and the other
signal layers.
The PCB layout should be designed so that substantial ESD hits from the network
discharge directly to the star-ground center point. Placing a 470 V MOV near the
network connector and near the center of the star ground shunts the majority of the
network ESD hit energy directly to the star center, which helps to limit the transient
current that passes through the FT-X3 transformer.
The PCB layer ground at the center of the star-ground should have a low-inductance
return to an external metal package if there is one. If there is no metal package, then
this ground area should connect to the ground areas near the power supply connector
and the external I/O connectors, as applicable. The transient current that is clamped
by the MOV should be routed off of the PCB as directly as possible, without any
74 Hardware Design Considerations