Echelon Series 6000 Chip databook - Manual (Page 139)

Checklist 7: Device Programming
This checklist applies to all Series 6000 chips, including FT 6000 Smart Transceivers and
Neuron 6000 Processors.
Check
When
Complete Item Description
PG1 For FT 6000 Smart Transceivers, TP/FT-10 is used as the channel
definition in the development tool.
For Neuron 6000 Processors, the appropriate channel type is
specified.
PG2 The device’s hardware template defines the appropriate clock
multiplier for the Series 6000 chip’s PLL to specify the system
clock rate.
Series 6000 Chip Data Book 127