Echelon Series 6000 Chip databook - Manual (Page 75)

Whenever the documentation for Series 6000 devices describes the system clock rate, it
refers to the 10 MHz to 80 MHz internal system clock rate that is specified in the device’s
hardware template, not the 10 MHz frequency value of the external crystal.
Reset Function
The reset function is a critical operation in any embedded microprocessor or microcontroller.
For Series 6000 chips, the following mechanisms initiate a reset:
• The RST~ pin is pulled low and then released by an external switch or circuit.
• Device power up.
• Watchdog timeout occurs during application execution. The watchdog period is fixed
at 840 ms (1.19 Hz) for all system clock rates. The actual timeout range is between
0.8 s and 1.7 s.
• Software command either from the application program or from the network.
• An exception trap (interrupt).
• The internal Low-Voltage Indicator (LVI) circuit detects a drop in the power supply
below a set level. See the FT 6000 Free Topology Smart Transceiver data sheet or
the Neuron 6000 Processor data sheet for internal LVI trip points.
During a reset, when the RST~ pin is in the low state, the Series 6000 chip pins go to the
following states:
• Oscillator continues to run
• All processor functions stop
• The SVC~ pin goes to high impedance, with pullup
• I/O pins go to high impedance
• All memory interface pins go to high impedance
Figure 28 illustrates the condition of the pins during reset and the Series 6000 chip
initialization sequence after the RST~ pin is released.
When the RST~ pin is released back to a high state, the Series 6000 chip begins its
initialization procedure starting at address 0x0001. The time it takes the Series 6000 chip to
complete its initialization differs between the type of external serial memory used (SPI or
I 2 C), different firmware versions that are being run, and the memory space used by the
application (code and data); see Reset Processes and Timing for more information.
RST~ Pin
The RST~ pin is both an input and an output. As an input, the RST~ pin is internally
pulled high by a resistor. The RST~ pin becomes an output when any of the following events
occur:
• Internal LVI detects a low voltage condition
• Software reset initialization
• Watchdog Timer event (times out)
• Traps
Series 6000 Chip Data Book 63