Lenze EVF9383 - Manual (Page 334)

Configuration
Code table
8
8.5
l
8.5−46 EDSVF9383V EN 4.0−03/2006
IMPORTANT Possible settings Code
Selection Lenze Name No.
C0758
s
CFG: IN 1000 FIXEDPHI−0 ^ Selection list 4 Configuration of input signal,
function block DFRFG1
l Speed/phase setpoint signal
^
8.2−13
C0759
s
CFG: QSP 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block DFRFG1
l HIGH = quick stop active
C0760
s
CFG: STOP 1000 FIXED0 ^ Selection list 2 Configuration of input signal,
function block DFRFG1
l HIGH = Status of the profile
generator is maintained,
setpoint is saved
C0761
s
CFG: RESET 1000 FIXED0 ^ Selection list 2 Configuration of input signal,
function block DFRFG1
l HIGH = resetting the
integrators
C0764 0 1 Function block DFRFG1
l Display of the signals linked in
C0759, C0760 and C0761
1 DIS: QSP
2 DIS: STOP
3 DIS: RESET
C0765 DIS: IN −32767 {1 rpm} 32767 Function block DFRFG1
l Display of the signal linked in
C0758
C0770
s
CFG: D 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block FLIP1 See System
Manual
(extension)
C0771
s
CFG: CLK 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block FLIP1
l Each LOW−HIGH edge at
FLIP1−CLK switches the signal
at FLIP1−D to FLIP1−OUT
C0772
s
CFG: CLR 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block FLIP1
l Resets the flip−flop
l HIGH: Sets FLIP1−OUT = LOW
l Input has highest priority
C0773 0 1 Function block FLIP1
l Display of the signals linked in
C0770, C0771 and C0773
1 DIS: D
2 DIS: CLK
3 DIS: CLR
C0775
s
CFG: D 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block FLIP2 See System
Manual
(extension)
C0776
s
CFG: CLK 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block FLIP2
l Each LOW−HIGH edge at
FLIP2−CLK switches the signal
at FLIP2−D to FLIP2−OUT
C0777
s
CFG: CLR 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block FLIP2
l Resets the flip−flop
l HIGH: sets FLIP2−OUT = LOW
l Input has highest priority
C0778 0 1 Function block FLIP2
l Display of the signals linked in
C0775, C0776 and C0777
1 DIS: D
2 DIS: CLK
3 DIS: CLR