Lenze EVF9383 - Manual (Page 319)

Configuration
Code table
8
8.5
l
8.5−31 EDSVF9383V EN 4.0−03/2006
IMPORTANT Possible settings Code
Selection Lenze Name No.
C0520
s
CFG: IN 1000 FIXEDPHI−0 ^ Selection list 4 Configuration of input signal,
function block DFSET
l Input of speed / phase setpoint
signal
^
8.2−18
C0521
s
CFG: VP−DIV 1000 FIXED0% ^ Selection list 1 Configuration of analog input
signal, function block DFSET
l Signal for numerator of
stretching factor
l 100 % = 16384 inc
C0522
s
CFG: RAT−DIV 1000 FIXED0% ^ Selection list 1 Configuration of analog input
signal, function block DFSET
l Signal for numerator of
gearbox factor
l 100 % = 16384 inc
C0523
s
CFG: A−TRIM 1000 FIXED0% ^ Selection list 1 Configuration of analog input
signal, function block DFSET
l Signal for phase trimming via
offset multiplier (C0529)
l 100 % = 16384 inc
C0524
s
CFG: N−TRIM 1000 FIXED0% ^ Selection list 1 Configuration of analog input
signal, function block DFSET
l Signal for speed trimming
l Signal in [%] of C0011
C0525
s
CFG: 0−PULSE 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block DFSET
l Signal for one−time zero pulse
activation
l HIGH = release for zero pulse
synchronisation
C0526
s
CFG: RESET 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block DFSET
l Signal for reset of integrators
l HIGH sets
– Position difference = 0
– DFSET−PSET = 0
– DFSET−PSET2 = 0
C0527
s
CFG: SET 1000 FIXED0 ^ Selection list 2 Configuration of digital input
signal, function block DFSET
l HIGH = Set phase integrators
to equal values
l LOW−HIGH edge sets
DFSET−PSET = 0
l HIGH−LOW edge sets
DFSET−PSET to the current
value of MCTRL−PHI−SET
l DFSET−SET has a higher priority
than DFSET−RESET
C0528 −2 . 10 9 {1} 2 . 10 9 Function block DFSET
l Display only
^
8.2−18
1 DIS: 0−pulse A Phase difference between two
zero pulses
2 DIS: Offset Offset = C0523 × C0529 + C0252