ALLIED Vision Technologies Pike F-1600 - Manual (Page 120)

Camera interfaces
PIKE Technical Manual V5.1.2
120
The cameras also have an advanced register which allows even more precise
image capture delay after receiving a hardware trigger.
Trigger delay advanced register
The advanced register allows the start of the integration to be delayed by max.
2
21
μs, which is max. 2.1 s after a trigger edge was detected.
Register Name Field Bit Description
0xF0F00834 TRIGGER_DELAY Presence_Inq [0] Presence of this feature:
0:N/
1: Available
Abs_Control [1] Absolute value control
O: Control with value in the
value field
1: Control with value in the
absolute value CSR. If this
bit=1 the value in the value
field has to be ignored.
--- [2..5] Reserved
ON_OFF [6] Write ON or OFF this feature
Read: Status of the feature
ON=1
OFF=0
--- [7..19] Reserved
Value [20..31] Value
Table 28: Trigger Delay CSR
Register Name Field Bit Description
0xF1000400 TRIGGER_DELAY Presence_Inq [0] Indicates presence of this
feature (read only)
--- [1..5] -
ON_OFF [6] Trigger delay on/off
--- [7..10] -
DelayTime [11..31] Delay time in μs
Table 29: Trigger delay advanced CSR