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7 tpc and low density parity check (ldpc) coding, 1 introduction – Comtech EF Data CDM-600/600L User Manual

Page 126

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CDM-600/600L Open Network Satellite Modem

Revision 3

Forward Error Correction Options

MN/CDM600L.IOM

6–6

Typically, in QPSK, 8-PSK and 16-QAM TPC modes the demod and decoder can remain
synchronized 2 – 3 dB below the Viterbi/Reed-Solomon or TCM cases.

6.7

TPC and Low Density Parity Check (LDPC) coding

6.7.1

Introduction

In the past few years there has been an unprecedented resurgence in interest in Forward Error
Correction (FEC) technology. The start of this new interest has its origins in the work done by
Claude Berrou et al, and the landmark paper in 1993 – Near Shannon Limit Error Correcting
Coding and Decoding – Turbo Codes
. FEC is considered an essential component in all wireless
and satellite communications in order to reduce the power and bandwidth requirements for
reliable data transmission.

Claude Shannon, considered by many to be the father of modern communications theory, first
established in his 1948 paper, A Mathematical Theory of Communication, the concept of Channel
Capacity. This places an absolute limit on how fast it is possible to transmit error-free data within
a channel of a given bandwidth, and with given noise conditions within that channel. He
concluded that it would only be possible to approach this limit through the use of source encoding
– what is familiar today as Forward Error Correction. He postulated that, if it were possible to
store every possible message in the receiver, finding the stored message that most closely
matched the incoming message would yield an optimum decoding method. However, for all but
the shortest bit sequences, the memory required for this – and the time taken to perform the
comparisons – makes this approach impractical. For all practical purposes, the memory
requirement and the decoding latency become infinite.

For many years, there were few advances in the quest to approach the Shannon Limit. The Viterbi
algorithm heralded a major step forward, followed in the early 1990s by the concatenation of a
Viterbi decoder with Reed-Solomon hard-decision block codes. However, it remained clear that
the Shannon Limit was still an elusive target. Berrou’s work on Turbo Codes showed, through the
use of an ingeniously simple approach – multiple, or iterative decoding passes – that it is possible
to achieve performance close to the Shannon Limit. Berrou’s early work dealt exclusively with
iteratively-decoded convolutional codes (Turbo Convolutional Coding, or TCC) but, in time, the
iterative approach was applied to a particular class of block codes called Product Codes – hence
Turbo Product Coding (TPC). TPC exhibits inherently low decoding latency compared with
TCC, and so is considered much more desirable for 2-way interactive satellite communications
applications.

In August 1999, Comtech became the first company in the world to offer, on a commercial basis,
satellite modems that incorporate TPC. Since its inception, Comtech has continued to develop
and refine its implementation of TPC in its products, and now offers a comprehensive range of
code rates (from Rate 5/16 to Rate 0.95) and modulations (from BPSK to 16-QAM).

However, in the past few years, as part of the general interest in Turbo coding, a third class of
Turbo coding has emerged, namely Low Density Parity Check Codes (LDPC). It is more like
TPC than TCC, in that it is an iteratively-decoded block code. Gallager first suggested this in
1962, but at the time, the implementation complexity was considered to be too great, and for
decades it remained of purely academic interest. In the present day, with silicon gates being