Rainbow Electronics ATtiny861_V - Manual (Page 73)

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2588B–AVR–11/06
ATtiny261/461/861
14.2.2 Definitions
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register or
bit defines in a program, the precise form must be used, i.e., TCNT0L for accessing
Timer/Counter0 counter value and so on.
The definitions in Table 14-1 are also used extensively throughout the document.
14.3 Timer/Counter Clock Sources
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T0 pin. The Clock Select logic is controlled by the Clock Select (CS02:0) bits located in the
Timer/Counter Control Register 0 B (TCCR0B), and controls which clock source and edge the
Timer/Counter uses to increment its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
T0
). For
details on clock sources and prescaler, see ”Timer/Counter0 Prescaler” on page 69 .
14.4 Counter Unit
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit. Figure
14-3 shows a block diagram of the counter and its surroundings.
Table 14-2. Counter Unit Block Diagram
Signal description (internal signals):
count Increment or decrement TCNT0 by 1.
clk
Tn
Timer/Counter clock, referred to as clk
T0
in the following.
top Signalize that TCNT0 has reached maximum value.
The counter is incremented at each timer clock (clk
T0
) until it passes its TOP value and then
restarts from BOTTOM. The counting sequence is determined by the setting of the WGM00 bits
located in the Timer/Counter Control Register (TCCR0A). For more details about counting
sequences, see
”Modes of Operation” on page 74 . clk
T0
can be generated from an external or
Table 14-1. Definitions
BOTTOM The counter reaches the BOTTOM when it becomes 0.
MAX
The counter reaches its MAXimum when it becomes 0xFF (decimal 255) in 8-bit mode or
0xFFFF (decimal 65535) in 16-bit mode.
TOP
The counter reaches the TOP when it becomes equal to the highest value in the count
sequence. The TOP value can be assigned to be the fixed value 0xFF/0xFFFF (MAX) or
the value stored in the OCR0A Register.
DATA BUS
TCNTn Control Logic
count
TOVn
(Int.Req.)
Clock Select
top
Tn
Edge
Detector
( From Prescaler )
clk
Tn