9 ocr1b - timer/counter1 output compare register b – Rainbow Electronics ATtiny861_V User Manual
Page 122

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2588B–AVR–11/06
ATtiny261/461/861
The Timer/Counter Output Compare Register A contains data to be continuously compared with
Timer/Counter1. Actions on compare matches are specified in TCCR1A. A compare match does
only occur if Timer/Counter1 counts to the OCR1A value. A software write that sets TCNT1 and
OCR1A to the same value does not generate a compare match.
A compare match will set the compare interrupt flag OCF1A after a synchronization delay follow-
ing the compare event.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Ouput Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
”Accessing 10-Bit Registers” on page 110
16.11.9
OCR1B – Timer/Counter1 Output Compare Register B
The output compare register B is an 8-bit read/write register.
The Timer/Counter Output Compare Register B contains data to be continuously compared with
Timer/Counter1. Actions on compare matches are specified in TCCR1. A compare match does
only occur if Timer/Counter1 counts to the OCR1B value. A software write that sets TCNT1 and
OCR1B to the same value does not generate a compare match.
A compare match will set the compare interrupt flag OCF1B after a synchronization delay follow-
ing the compare event.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
”Accessing 10-Bit Registers” on page 110
16.11.10 OCR1C – Timer/Counter1 Output Compare Register C
The output compare register C is an 8-bit read/write register.
The Timer/Counter Output Compare Register C contains data to be continuously compared with
Timer/Counter1, and a compare match will clear TCNT1. This register has the same function in
Normal mode and PWM modes.
Note that, if a smaller value than three is written to the Output Compare Register C, the value is
automatically replaced by three as it is a minumum value allowed to be written to this register.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
”Accessing 10-Bit Registers” on page 110
Bit
7
6
5
4
3
2
1
0
0x2C (0x4C)
MSB
LSB
OCR1B
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
0x2B (0x4B)
MSB
LSB
OCR1C
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
1
1
1
1
1
1
1
1