Rainbow Electronics ATtiny861_V - Manual (Page 191)

191
2588B–AVR–11/06
ATtiny261/461/861
23.7 Parallel Programming Characteristics
Figure 23-4. Parallel Programming Timing, Including some General Timing Requirements
Figure 23-5. Parallel Programming Timing, Loading Sequence with Timing Requirements (1)
Note: 1. The timing requirements shown in Figure 23-4 (i.e., t
DVXH
, t
XHXL
, and t
XLDX
) also apply to load-
ing operation.
Data & Contol
(DATA, XA0, XA1/BS2, PAGEL/BS1)
XTAL1
t
XHXL
t
WLWH
t
DVXH
t
XLDX
t
PLWL
t
WLRH
WR
RDY/BSY
t
PLBX
t
BVPH
t
XLWL
t
WLBX
t
BVWL
WLRL
XTAL1
XLXH
t
ADDR0 (Low Byte) DATA (Low Byte) DATA (High Byte) ADDR1 (Low Byte) DATA
PAGEL/BS1
XA0
XA1/BS2
LOAD ADDRESS
(LOW BYTE)
LOAD DATA
(LOW BYTE)
LOAD DATA
(HIGH BYTE)
LOAD ADDRESS
(LOW BYTE)