Rainbow Electronics ATtiny861_V - Manual (Page 21)

21
2588B–AVR–11/06
ATtiny261/461/861
6.4 I/O Memory
The I/O space definition of the ATtiny261/461/861 is shown in ”Register Summary” on page 218 .
All ATtiny261/461/861 I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
instruction set section for more details. When using the I/O specific commands IN and OUT, the
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
6.4.1 General Purpose I/O Registers
The ATtiny261/461/861 contains three General Purpose I/O Registers. These registers can be
used for storing any information, and they are particularly useful for storing global variables and
Status Flags. General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
6.5 Register Description
6.5.1 EEARH and EEARL – EEPROM Address Register
• Bit 7:1 – Res6:0: Reserved Bits
These bits are reserved for future use and will always read as 0 in ATtiny261/461/861.
• Bits 8:0 – EEAR8:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL – specifies the high EEPROM address
in the 128/256/512 bytes EEPROM space. The EEPROM data bytes are addressed linearly
between 0 and 127/255/511. The initial value of EEAR is undefined. A proper value must be writ-
ten before the EEPROM may be accessed.
Bit 7 6 5 4 3 2 1 0
0x1F (0x3F) - - - - - - - EEAR8 EEARH
0x1E (0x3E) EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL
Bit 7 6 5 4 3 2 1 0
Read/Write R R R R R R R R/W
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 X
Initial Value X X X X X X X X