6 tcnt1 - timer/counter1, 7 tc1h - timer/counter1 high byte, 8 ocr1a - timer/counter1 output compare register a – Rainbow Electronics ATtiny861_V User Manual
Page 121: Pb0), Pb1), Pb2), Pb3), Pb4), Pb5)
121
2588B–AVR–11/06
ATtiny261/461/861
the Output Compare Override Enable Bit is cleared.
Table 16-20
shows the Output Compare
Override Enable Bits and their corresponding Output Compare pins.
16.11.6
TCNT1 – Timer/Counter1
This 8-bit register contains the value of Timer/Counter1.
The Timer/Counter1 is realized as a 10-bit up/down counter with read and write access. Due to
synchronization of the CPU, Timer/Counter1 data written into Timer/Counter1 is delayed by one
and half CPU clock cycles in synchronous mode and at most one CPU clock cycles for asyn-
chronous mode. When a 10-bit accuracy is preferred, special procedures must be followed for
accessing the 10-bit TCNT1 register via the 8-bit AVR data bus. These procedures are
described in section
”Accessing 10-Bit Registers” on page 110
. Alternatively the Timer/Counter1
can be used as an 8-bit Timer/Counter. Note that the Timer/Counter1 always starts counting up
after writing the TCNT1 register.
16.11.7
TC1H – Timer/Counter1 High Byte
The temporary Timer/Counter1 register is an 2-bit read/write register.
• Bits 7:2 - Res: Reserved Bits
These bits are reserved bits in the ATtiny261/461/861 and always reads as zero.
• Bits 1:0 - TC19, TC18: Two MSB bits of the 10-bit accesses
If 10-bit accuracy is used, the Timer/Counter1 High Byte Register (TC1H) is used for temporary
storing the MSB bits (TC19, TC18) of the 10-bit acceses. The same TC1H register is shared
between all 10-bit registers within the Timer/Counter1. Note that special procedures must be fol-
lowed when accessing the 10-bit TCNT1 register via the 8-bit AVR data bus. These procedures
are described in section
”Accessing 10-Bit Registers” on page 110
16.11.8
OCR1A – Timer/Counter1 Output Compare Register A
The output compare register A is an 8-bit read/write register.
Table 16-20. Output Compare Override Enable Bits vs. Output Compare Pins
OC1OE0
OC1OE1
OC1OE2
OC1OE3
OC1OE4
OC1OE5
OC1A
(PB0)
OC1A
(PB1)
OC1B
(PB2)
OC1B
(PB3)
OC1D
(PB4)
OC1D
(PB5)
Bit
7
6
5
4
3
2
1
0
0x2E (0x4E)
MSB
LSB
TCNT1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
0x25 (0x45)
-
-
-
-
-
-
TC19
TC18
TC1H
Read/Write
R
R
R
R
R
R
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
0x2D (0x4D)
MSB
LSB
OCR1A
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0