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2 ifast pwm mode – Rainbow Electronics ATtiny861_V User Manual

Page 102

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102

2588B–AVR–11/06

ATtiny261/461/861

toggle its logical level on each Compare Match by setting the Compare Output mode bits to tog-
gle mode (COM1x1:0 = 1). The OC1x value will not be visible on the port pin unless the data
direction for the pin is set to output. The waveform generated will have a maximum frequency of
f

OC1x

= f

clkT1

/4 when OCR1C is set to zero. The waveform frequency is defined by the following

equation:

Resolution shows how many bit is required to express the value in the OCR1C register. It is cal-
culated by following equation:

Resolution

PWM

= log

2

(OCR1C + 1).

The Output Compare Pin configurations in Normal Mode are described in

Table 16-2

.

16.7.2

I

Fast PWM Mode

The fast Pulse Width Modulation or fast PWM mode (PWM1x = 1 and WGM10 = 0) provides a
high frequency PWM waveform generation option. The fast PWM differs from the other PWM
option by its single-slope operation. The counter counts from BOTTOM to TOP (defined as
OCR1C) then restarts from BOTTOM. In non-inverting Compare Output mode the Waveform
Output (OCW1x) is cleared on the Compare Match between TCNT1 and OCR1x and set at
BOTTOM. In inverting Compare Output mode, the Waveform Output is set on Compare Match
and cleared at BOTTOM. In complementary Compare Output mode the Waveform Output is
cleared on the Compare Match and set at BOTTOM.

Due to the single-slope operation, the operating frequency of the fast PWM mode can be twice
as high as the Phase and Frequency Correct PWM mode that use dual-slope operation. This
high frequency makes the fast PWM mode well suited for power regulation, rectification, and
DAC applications. High frequency allows physically small sized external components (coils,
capacitors), and therefore reduces total system cost.

The timing diagram for the fast PWM mode is shown in

Figure 16-11

. The counter is incre-

mented until the counter value matches the TOP value. The counter is then cleared at the
following timer clock cycle. The TCNT1 value is in the timing diagram shown as a histogram for
illustrating the single-slope operation. The diagram includes the Waveform Output in non-
inverted and inverted Compare Output modes. The small horizontal line marks on the TCNT1
slopes represent Compare Matches between OCR1x and TCNT1.

Table 16-2.

Output Compare Pin Configurations in Normal Mode

COM1x1

COM1x0

OC1x Pin

OC1x Pin

0

0

Disconnected

Disconnected

0

1

Disconnected

OC1x

1

0

Disconnected

OC1x

1

1

Disconnected

OC1x

f

OC1x

f

clkT1

2

1

OCR1C

+

(

)

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=