Rainbow Electronics ATmega64C1 - Manual (Page 58)

58
7647A–AVR–02/08
ATmega32/64/M1/C1
0x03C jmp SPM_RDY ; Store Program Memory Ready Handler
;
.org 0xC00
0xC00 RESET: ldi r16,high(RAMEND); Main program start
0xC01 out SPH,r16 ; Set Stack Pointer to top of RAM
0xC02 ldi r16,low(RAMEND)
0xC03 out SPL,r16
0xC04 sei ; Enable interrupts
0xC05 xxx
When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses in ATmega32/64/M1/C116/32 is:
Address Labels Code Comments
;
.org 0xC00
0xC00 jmp RESET ; Reset handler
0xC02 jmp ANA_COMP_0 ; Analog Comparator 0 Handler
0xC04 jmp ANA_COMP_1 ; Analog Comparator 1 Handler
... ... ... ;
0xC3C jmp SPM_RDY ; Store Program Memory Ready Handler
;
0xC3E RESET: ldi r16,high(RAMEND); Main program start
0xC3F out SPH,r16 ; Set Stack Pointer to top of RAM
0xC40 ldi r16,low(RAMEND)
0xC41 out SPL,r16
0xC42 sei ; Enable interrupts
0xC43 xxx
8.1.1 Moving Interrupts Between Application and Boot Space
The MCU Control Register controls the placement of the Interrupt Vector table.
8.1.2 MCU Control Register – MCUCR
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section
“Boot Loader Support – Read-While-Write
Self-Programming ATmega32/64M1” on page 272 for details. To avoid unintentional changes of
Interrupt Vector tables, a special write procedure must be followed to change the IVSEL bit:
Bit 7 6 5 4 3 2 1 0
SPIPS – – PUD – – IVSEL IVCE MCUCR
Read/Write R/W R R R/W R R R/W R/W
Initial Value 0 0 0 0 0 0 0 0