Rainbow Electronics ATmega64C1 - Manual (Page 20)

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7647A–AVR–02/08
ATmega32/64/M1/C1
4. Memories
This section describes the different memories in the ATmega32/64/M1/C1. The AVR architec-
ture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega32/64/M1/C1 features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
4.1 In-System Reprogrammable Flash Program Memory
The ATmega32/64/M1/C1 contains 32K/64K bytes On-chip In-System Reprogrammable Flash
memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-
nized as 16K x 16 / 32K x 16. For software security, the Flash Program memory space is divided
into two sections, Boot Program section and Application Program section.
T h e F la s h m e m o r y h a s a n e n d u r a n c e o f a t l e a s t 1 0 ,0 0 0 w r i t e / e r a s e c y c l e s . T h e
ATmega32/64/M1/C1 Program Counter (PC) is 14/15 bits wide, thus addressing the 16K/32K
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
“Boot Loader Support – Read-While-Write
Self-Programming ATmega32/64M1” on page 272 . “Memory Programming” on page 289 con-
tains a detailed description on Flash programming in SPI or Parallel programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory.
Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-
ing” on page 16 .
Figure 1. Program Memory Map
4.2 SRAM Data Memory
Figure 2 shows how the ATmega32/64/M1/C1 SRAM Memory is organized.
0x0000
0x3FFF/0x7FFF
Program Memory
Application Flash Section
Boot Flash Section