Rainbow Electronics ATmega64C1 - Manual (Page 106)

106
7647A–AVR–02/08
ATmega32/64/M1/C1
13. 16-bit Timer/Counter1 with PWM
The 16-bit Timer/Counter unit allows accurate program execution timing (event management),
wave generation, and signal timing measurement. The main features are:
• True 16-bit Design (i.e., Allows 16-bit PWM)
• Two independent Output Compare Units
• Double Buffered Output Compare Registers
• One Input Capture Unit
• Input Capture Noise Canceler
• Retriggering Function by External Signal (ICP1A or ICP1B)
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Variable PWM Period
• Frequency Generator
• External Event Counter
• Four independent interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1)
13.1 Overview
Most register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, and a lower case “x” replaces the Output Compare unit
channel. However, when using the register or bit defines in a program, the precise form must be
used, i.e., TCNT1 for accessing Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 13-1 . For the actual
placement of I/O pins, refer to “Pin Descriptions” on page 5 . CPU accessible I/O Registers,
including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit loca-
tions are listed in the
“16-bit Timer/Counter Register Description” on page 126 .
The PRTIM1 bit in “Power Reduction Register” on page 41 must be written to zero to enable
Timer/Counter1 module.