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6 bit timing, 1 baud rate generator, 2 re-synchronization in lin mode – Rainbow Electronics ATmega64C1 User Manual

Page 212: 3 handling lbt[5

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212

7647A–AVR–02/08

ATmega32/64/M1/C1

“LIN Data Register” - LINDAT.

The busy signal is not generated during a byte reception.

17.5.6

Bit Timing

17.5.6.1

Baud rate Generator

The baud rate is defined to be the transfer rate in bits per second (bps):

BAUD: Baud rate (in bps),

f

clk

i/o

: System I/O clock frequency,

LDIV[11..0]: Contents of LINBRRH & LINBRRL registers - (0-4095), the pre-scaler receives
clk

i/o

as input clock.

LBT[5..0]: Least significant bits of - LINBTR register- (0-63) is the number of samplings in a
LIN or UART bit (default value 32).

Equation for calculating baud rate:

BAUD =

f

clk

i/o

/ LBT[5..0] x (LDIV[11..0] + 1)

Equation for setting LINDIV value:

LDIV[11..0] = (

f

clk

i/o

/ LBT[5..0] x BAUD ) - 1

Note that in reception a majority vote on three samplings is made.

17.5.6.2

Re-synchronization in LIN Mode

When waiting for Rx Header, LBT[5..0] = 32 in LINBTR register. The re-synchronization begins
when the BREAK is detected. If the BREAK size is not in the range (11 bits min., 28 bits max. —
13 bits nominal), the BREAK is refused. The re-synchronization is done by adjusting LBT[5..0]
value to the SYNCH field of the received header (0x55). Then the PROTECTED IDENTIFIER is
sampled using the new value of LBT[5..0]. The re-synchronization implemented in the controller
tolerates a clock deviation of ± 20% and adjusts the baud rate in a ± 2% range.

The new LBT[5..0] value will be used up to the end of the response. Then, the LBT[5..0] will be
reset to 32 for the next header.

The LINBTR register can be used to re-calibrate the clock oscillator.

The re-synchronization is not performed if the LIN node is enabled as a master.

17.5.6.3

Handling LBT[5..0]

LDISR bit of LINBTR register is used to:

To enable the setting of LBT[5..0] (to manually adjust the baud rate especially in the case of
UART mode). A minimum of 8 is required for LBT[5..0] due to the sampling operation.

Disable the re-synchronization in LIN Slave Mode for test purposes.

Note that the LENA bit of LINCR register is important for this handling (see

Figure 17-8 on page

213

).