Rainbow Electronics ATmega64C1 - Manual (Page 218)

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7647A–AVR–02/08
ATmega32/64/M1/C1
Figure 17-13. LIN Interrupt Mapping
17.5.14 Message Filtering
Message filtering based upon the whole identifier is not implemented. Only a status for frame
headers having 0x3C, 0x3D, 0x3E and 0x3F as identifier is available in the LINSIR register.
The LIN protocol says that a message with an identifier from 60 (0x3C) up to 63 (0x3F) uses a
classic checksum (sum over the data bytes only). Software will be responsible for switching cor-
rectly the LIN13 bit to provide/check this expected checksum (the insertion of the ID field in the
computation of the CRC is set - or not - just after entering the Rx or Tx Response command).
17.5.15 Data Management
17.5.15.1 LIN FIFO Data Buffer
To preserve register allocation, the LIN data buffer is seen as a FIFO (with address pointer
accessible). This FIFO is accessed via the LINDX[2..0] field of LINSEL register through the LIN-
DAT register.
LINDX[2..0], the data index, is the address pointer to the required data byte. The data byte can
be read or written. The data index is automatically incremented after each LINDAT access if the
LAINC (active low) bit is cleared. A roll-over is implemented, after data index=7 it is data
index=0. Otherwise, if LAINC bit is set, the data index needs to be written (updated) before each
LINDAT access.
The first byte of a LIN frame is stored at the data index=0, the second one at the data index=1,
and so on. Nevertheless, LINSEL must be initialized by the user before use.
LIDOK
LINSIR.2
LTXOK
LINSIR.1
LRXOK
LINSIR.0
LABORT
LINERR.7
LTOERR
LINERR.6
LOVERR
LINERR.5
LERR
LINSIR.3
LIN IT
LENERR
LFERR
LINERR.4
LSERR
LINERR.3
LPERR
LINERR.2
LCERR
LINERR.1
LBERR
LINERR.0
LIN ERR
LENIDOK
LINENIR.2
LENTXOK
LINENIR.1
LENRXOK
LINENIR.0 LINENIR.3
Table 17-4. Frame Status
LIDST[2..0] Frame Status
0xx
b
No specific identifier
100
b
60 (0x3C) identifier
101
b
61 (0x3D) identifier
110
b
62 (0x3E) identifier
111
b
63 (0x3F) identifier