Rainbow Electronics W90N745CDG - Manual (Page 8)

W90N745CD/W90N745CDG
Publication Release Date: September 22, 2006
- 3 - Revision A2
DMA Controller
• 2-channel general DMA for memory-to-memory data transfers without CPU intervention
• Initialed by a software or external DMA request
• Increments or decrements a source or destination address in 8-bit, 16-bit or 32-bit data transfers
• 4-data burst mode
UART
• Four UART (serial I/O) blocks with interrupt-based operation
• Support for 5-bit, 6-bit, 7-bit or 8-bit serial data transmit and receive
• Programmable baud rates
• 1, ½ or 2 stop bits
• Odd or even parity
• Break generation and detection
• Parity, overrun and framing error detection
• X16 clock mode
• UART1 supports Bluetooth, and UART2 supports IrDA1.0 SIR
Timers
• Two programmable 24-bit timers with 8-bit pre-scaler
• One programmable 20 bit with selectable additional 8-bit prescaler watchdog timer
• One-shot mode, periodical mode or toggle mode operation
Programmable I/Os
• 31 programmable I/O ports
• Pins individually configurable to input, output or I/O mode for dedicated signals
• I/O ports are configurable for multiple functions
Advanced Interrupt Controller
• 24 interrupt sources, including 4 external interrupt sources
• Programmable normal or fast interrupt mode (IRQ, FIQ)
• Programmable as either edge-triggered or level-sensitive for 4 external interrupt sources
• Programmable as either low-active or high-active for 4 external interrupt sources
• Priority methodology is encoded to allow for interrupt daisy-chaining
• Automatically mask out the lower priority interrupt during interrupt nesting