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Rainbow Electronics W90N745CDG User Manual

Page 317

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W90N745CD/W90N745CDG

Publication Release Date: September 22, 2006

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313

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Revision

A2

BITS

DESCRIPTIONS

[31:1]

Reserved

Reserved

[0]

TEST

This register indicates whether AIC_IPER will be cleared or not after
been read. If bit0 of AIC_TEST has been set, ICE or debug monitor can
read AIC_IPER for verification and the AIC_IPER will not be cleared
automatically. Write access to the AIC_IPER will perform the interrupt
stacking in this mode.
TEST: ICE/Debug mode
0 = normal mode.
1 = ICE/Debug mode.