Rainbow Electronics W90N745CDG - Manual (Page 401)

W90N745CD/W90N745CDG
Publication Release Date: September 22, 2006
- 397 - Revision A2
SYMBOL DESCRIPTION MIN MAX UNIT
F
USI
USI clock frequency - 20 MHz
T
CLKH
USI clock high time 12.5 - ns
T
CLKL
USI clock low time - - ns
T
ISU
Data input setup time - 14 ns
T
IH
Data input hold time 0 - ns
T
lead
USI enable lead time 12.5 - ns
T
lag
USI enable lag time 12.5 - ns
T
OD
USI output data valid time - 30 ns
7.3.8 PS2 Interface AC Characteristics
PS2_CLK
PS2_DATA
T1 T2
T3 T4
Start Bit Bit 0 Parity Bit
STOP Bit
1st
CLK
2nd
CLK
10th
CLK
11th
CLK
Timing for data received from the auxiliary device
T9
T8 T7
1st
CLK
2nd
CLK
9th
CLK
10th
CLK
11th
CLK
PS2_DATA
PS2_CLK
Parity Bit
Timing for data send to the auxiliary device
T5
Bit 0