Rainbow Electronics W90N745CDG - Manual (Page 362)

W90N745CD/W90N745CDG
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6.16 PWM
The W90N745 have 4 channels PWM timers. They can be divided into two groups. Each group has 1
Prescaler, 1 clock divider, 2 clock selectors, 2 16-bit counters, 2 16-bit comparators, 1 Dead-Zone
generator. They are all driven by PCLK (80 MHz). Each channel can be used as a timer and issue
interrupt independently.
Two channels PWM timers in one group share the same prescaler. Clock divider provides each
channel with 5 clock sources (1, 1/2, 1/4, 1/8, 1/16). Each channel receives its own clock signal from
clock divider which receives clock from 8-bit prescaler. The 16-bit counter in each channel receive
clock signal from clock selector and can be used to handle one PWM period. The 16-bit comparator
compares number in counter with threshold number in register loaded previously to generate PWM
duty cycle.
The clock signal from clock divider is called PWM clock. Dead-Zone generator utilize PWM clock as
clock source. Once Dead-Zone generator is enabled, output of two PWM timer in one group is
blocked. Two output pin are all used as Dead-Zone generator output signal to control off-chip power
device.
To prevent PWM driving output pin with unsteady waveform, 16-bit counter and 16-bit comparator are
implemented with double buffering feature. User can feel free to write data to counter buffer register
and comparator buffer register without generating glitch.
When 16-bit down counter reaches zero, the interrupt request is generated to inform CPU that time is
up. When counter reaches zero, if counter is set as toggle mode, it is reloaded automatically and start
to generate next cycle. User can set counter as one-shot mode instead of toggle mode. If counter is
set as one-shot mode, counter will stop and generate one interrupt request when it reaches zero.
The value of comparator is used for pulse width modulation. The counter control logic changes the
output level when down-counter value matches the value of compare register.
The PWM timer features are shown as below:
z Two 8-bit prescalers and two clock dividers
z Four clock selectors
z Four 16-bit counters and four 16-bit comparators
z Two Dead-Zone generator