Rainbow Electronics W90N745CDG - Manual (Page 38)

W90N745CD/W90N745CDG
Publication Release Date: September 22, 2006
- 33 - Revision A2
Table 6.2.7 Byte access write operation with Big Endian
ACCESS OPERATION WRITE OPERATION (CPU REGISTER EXTERNAL MEMORY)
XD WIDTH HALF WORD BYTE
Bit Number
CPU Reg Data
31 0
ABCD 31 0
ABCD
SA BAL BAU BA
Bit Number
SD
31 0
D D D D
31 0
D D D D
31 0
D D D D
Bit Number
ED
15 8
D
7 0
D
7 0
D
XA BAL BAL BA
nWBE [1-0] /
SDQM [1-0]
AU UA XA
Bit Number
XD
15 0
D X
15 0
X D
7 0
D
Bit Number
Ext. Mem Data
15 8
D
7 0
D
7 0
D
Timing Sequence
Table 6.2.8 Byte access read operation with Big Endian
ACCESS OPERATION READ OPERATION (CPU REGISTER Í EXTERNAL MEMORY)
XD WIDTH HALF WORD BYTE
Bit Number
CPU Reg Data
7 0
C
7 0
D
7 0
D
SA BAL BAU BA
Bit Number
SD
7 0
C
7 0
D
7 0
D
Bit Number
ED
7 0
C
15 8
D
7 0
D
XA BAL BAL BA
SDQM [1-0] AU UA XA
Bit Number
XD
15 0
CD
15 0
CD
7 0
D
Bit Number
Ext. Mem Data
15 0
CD
7 0
D
Timing Sequence